Description
This diagram is a specialization of SysML Internal Block Definition Diagram for the Hardware Architecture in Magic Systems EE Architect.
Location
The diagrams are created under the Topology and HPC Package in the Containment tree.
Concepts
| Supported Concept | Description |
|---|---|
| Topology | Composition of the hardware devices and their interconnections |
| Electronic Control Unit | |
| Hardware Port | Port typed by hardware interface |
| Hardware Interface | Typed with protocols CAN family, LIN, FlexRay, Ethernet, MOST, and wired link. It can be used to ensure consistency of the hardware interfaces |
| High Performance Computer | Hierarchical definition of a High Performance Computer with its internal components. |
| Hypervisor | Part of the internal High Performance Computer definition |
| Runtime | A runtime defines a virtual execution environment |
| Container | A container defines an isolated virtual execution environment for applications |
| MicroController | Hardware part of HPC |
| MicroProcessor | Hardware part of HPC |
| Core | Hardware part of HPC |
| Sensor | |
| Actuator | |
| Electrical Device | It can be a battery, fuse, relay |
| Device | Openness for any device |
| Communication Bus | Typed with protocols CAN family, LIN, FlexRay, MOST |
| Wired Link | Wire connection between hardware ports |
| Virtual Local Area Network | Definition of Virtual Local Area Network on Ethernet segment for Ethernet communication backbone |
| Ethernet Segment | Ethernet connection between hardware ports |
| Switch | Ethernet switch |
Examples
This example is taken from the sample model.
The samples are located in <modeling tool installation directory>samples\CATIA EE Architecture\
